DSP FPGA Versions
-----------------

1.03
----
'Data available' bit in data sampling status register is now written
with a '1' to clear it (not a '0' as before).

New function to allow early access to data added:
New read-only register 'BScans in SRAM'
New bit in 'Data Sampling Status' reg - 'Some Data sampled/Req early data'
Modified the way 'SRAM Control - No of Scans' register is used to A-Scans and B-Scans.

1.06
----
Fixed bug where 2 many encoder data words were being written
with the A-Scan data.

1.07
----
Fixed bug where triggers being received whilst A-Scans were active mean Data
available never returned.