---------------------------------------------------------------------------
-- NDT Solutions Ltd. Proprietary Information
-- Company Confidential
-- Copyright 2004
--
-- Filename: StrobeExtender.vhd
-- Language: VHDL '93
-- Project:  Digitiser Card (Shared component)
--
-- Design Description:
-- Module to extend a single clock wide strobe
--
-- This module uses an LFSR to extend the strobe rather than a counter to
-- reduce gate count and improve speed.
--
-- The extended strobe will be (2^gLfsrBits - 1) clock cycles long
---------------------------------------------------------------------------

library IEEE;
use IEEE.Std_Logic_1164.all;
use IEEE.Std_Logic_Arith.all;

entity StrobeExtender is
  generic(gLfsrBits: integer range 3 to 32 := 3);
  port(pnReset    : in  std_ulogic;
       pClk       : in  std_ulogic;
       pStrobeIn  : in  std_ulogic;
       pStrobeOut : out std_ulogic);
end entity StrobeExtender;


architecture rtl of StrobeExtender is

  -- Constant defining the reset state of the LFSR
  constant cResetState: std_logic_vector(gLfsrBits-1 downto 0) := (others => '1');
  
  signal CountLFSR:   std_logic_vector(gLfsrBits-1 downto 0);
  signal FeedbackBit: std_logic;  -- Used std_logic instead of std_ulogic tp remove compiler warnings
  

begin

  GenpStrobeOut: process(pnReset, pClk)
  begin
    if pnReset = '0' then
      pStrobeOut  <= '0';
      CountLFSR   <= cResetState;
    elsif rising_edge(pClk) then
      if pStrobeIn = '1' then
        -- Begin the delay
        pStrobeOut <= '1';
        CountLFSR <= CountLFSR(gLfsrBits-2 downto 0) & FeedbackBit;
      elsif CountLFSR /= cResetState then
        -- Delay in progress
        CountLFSR <= CountLFSR(gLfsrBits-2 downto 0) & FeedbackBit;
      else
        -- Delay complete
        pStrobeOut <= '0';
      end if;
    end if;
  end process GenpStrobeOut;
  
  
  -- Generate the feedback bit depending on the no of LFSR bits
  Gen3bits: if gLfsrBits = 3 generate
    FeedbackBit <= CountLFSR(2) xor CountLFSR(1);
  end generate Gen3bits;

  Gen4bits: if gLfsrBits = 4 generate
    FeedbackBit <= CountLFSR(3) xor CountLFSR(2);
  end generate Gen4bits;

  Gen5bits: if gLfsrBits = 5 generate
    FeedbackBit <= CountLFSR(4) xor CountLFSR(2);
  end generate Gen5bits;

  Gen6bits: if gLfsrBits = 6 generate
    FeedbackBit <= CountLFSR(5) xor CountLFSR(4);
  end generate Gen6bits;

  Gen7bits: if gLfsrBits = 7 generate
    FeedbackBit <= CountLFSR(6) xor CountLFSR(5);
  end generate Gen7bits;

  Gen8bits: if gLfsrBits = 8 generate
    FeedbackBit <= CountLFSR(7) xor CountLFSR(6) xor CountLFSR(5) xor CountLFSR(0);
  end generate Gen8bits;

  Gen9bits: if gLfsrBits = 9 generate
    FeedbackBit <= CountLFSR(8) xor CountLFSR(4);
  end generate Gen9bits;

  Gen10bits: if gLfsrBits = 10 generate
    FeedbackBit <= CountLFSR(9) xor CountLFSR(6);
  end generate Gen10bits;

  Gen11bits: if gLfsrBits = 11 generate
    FeedbackBit <= CountLFSR(10) xor CountLFSR(8);
  end generate Gen11bits;
  
  Gen12bits: if gLfsrBits = 12 generate
    FeedbackBit <= CountLFSR(11) xor CountLFSR(10) xor CountLFSR(9) xor CountLFSR(3);
  end generate Gen12bits;

  Gen13bits: if gLfsrBits = 13 generate
    FeedbackBit <= CountLFSR(12) xor CountLFSR(11) xor CountLFSR(10) xor CountLFSR(7);
  end generate Gen13bits;

  Gen14bits: if gLfsrBits = 14 generate
    FeedbackBit <= CountLFSR(13) xor CountLFSR(12) xor CountLFSR(11) xor CountLFSR(1);
  end generate Gen14bits;

  Gen15bits: if gLfsrBits = 15 generate
    FeedbackBit <= CountLFSR(14) xor CountLFSR(13);
  end generate Gen15bits;

  Gen16bits: if gLfsrBits = 16 generate
    FeedbackBit <= CountLFSR(15) xor CountLFSR(14) xor CountLFSR(12) xor CountLFSR(3);
  end generate Gen16bits;
  
  Gen17bits: if gLfsrBits = 17 generate
    FeedbackBit <= CountLFSR(16) xor CountLFSR(15);
  end generate Gen17bits;

  Gen18bits: if gLfsrBits = 18 generate
    FeedbackBit <= CountLFSR(17) xor CountLFSR(10);
  end generate Gen18bits;

  Gen19bits: if gLfsrBits = 19 generate
    FeedbackBit <= CountLFSR(18) xor CountLFSR(17) xor CountLFSR(16) xor CountLFSR(13);
  end generate Gen19bits;

  Gen20bits: if gLfsrBits = 20 generate
    FeedbackBit <= CountLFSR(19) xor CountLFSR(16);
  end generate Gen20bits;

  Gen21bits: if gLfsrBits = 21 generate
    FeedbackBit <= CountLFSR(20) xor CountLFSR(18);
  end generate Gen21bits;

  Gen22bits: if gLfsrBits = 22 generate
    FeedbackBit <= CountLFSR(21) xor CountLFSR(20);
  end generate Gen22bits;

  Gen23bits: if gLfsrBits = 23 generate
    FeedbackBit <= CountLFSR(22) xor CountLFSR(17);
  end generate Gen23bits;

  Gen24bits: if gLfsrBits = 24 generate
    FeedbackBit <= CountLFSR(23) xor CountLFSR(22) xor CountLFSR(21) xor CountLFSR(16);
  end generate Gen24bits;

  Gen25bits: if gLfsrBits = 25 generate
    FeedbackBit <= CountLFSR(24) xor CountLFSR(21);
  end generate Gen25bits;

  Gen26bits: if gLfsrBits = 26 generate
    FeedbackBit <= CountLFSR(25) xor CountLFSR(24) xor CountLFSR(23) xor CountLFSR(19);
  end generate Gen26bits;

  Gen27bits: if gLfsrBits = 27 generate
    FeedbackBit <= CountLFSR(26) xor CountLFSR(25) xor CountLFSR(24) xor CountLFSR(21);
  end generate Gen27bits;

  Gen28bits: if gLfsrBits = 28 generate
    FeedbackBit <= CountLFSR(27) xor CountLFSR(24);
  end generate Gen28bits;

  Gen29bits: if gLfsrBits = 29 generate
    FeedbackBit <= CountLFSR(28) xor CountLFSR(26);
  end generate Gen29bits;
  
  Gen30bits: if gLfsrBits = 30 generate
    FeedbackBit <= CountLFSR(29) xor CountLFSR(28) xor CountLFSR(27) xor CountLFSR(6);
  end generate Gen30bits;
  
  Gen31bits: if gLfsrBits = 31 generate
    FeedbackBit <= CountLFSR(30) xor CountLFSR(27);
  end generate Gen31bits;

  Gen32bits: if gLfsrBits = 32 generate
    FeedbackBit <= CountLFSR(31) xor CountLFSR(30) xor CountLFSR(29) xor CountLFSR(9);
  end generate Gen32bits;


end architecture rtl;
